The electronic industry continues to seek products that are lighter, faster, smaller, multi-functional, more reliable and more cost-effective. The advent of multi-function electronic devices, such as cell phones that are also game platforms, cameras, Internet portals, and music or video players, has brought immense pressure on the electronics device manufacturers and the manufacturing companies that support them.
In an effort to meet such requirements, package assembly techniques have been developed for multi-chip packages (MCP) and chip stack packages. These types of packages combine two or more semiconductor chips in a single package, thereby realizing increased memory density, multi-functionality and/or reduced package footprint.
The use of several chips in a single package does, however, tend to reduce both reliability and yield. During post assembly testing, if just one chip in the multi-chip or chip stack package fails to meet the functional or performance specifications, the entire package fails, causing the good chip(s) to be discarded along with the failing chip. As a result, multi-chip and chip stack package tend to lower the productivity from the assembly process.
A 3-dimensional package stack addresses this yield problem by stacking several assembled packages that each contain a single chip and that have already passed the necessary tests, thereby improving the yield and reliability of the final composite package. As the complexity of the functions in the stacked integrated circuit packages increases, the number of interconnected signals increases also. This problem is increased by the reduction in package size which the interconnected signals to be compressed in smaller and smaller spaces.
Attempts to form area array type packages have met with other difficulties. Positioning of the contacts within the array and alignment between the two stacked interfaces has proved a daunting problem. The close proximity of the signal interconnects and the frequency of the signal transitions may create cross-talk and signal integrity problems. Also the shrinking of the package size may bring the integrated circuit die in the stacked packages into close proximity, which may have detrimental effects on the function of the integrated circuit die due to radiated electro-magnetic noise.
Thus, a need still remains for an integrated circuit packaging system with package stacking, in order to meet the volume and performance needs of the electronic devices industry. In view of the ever-growing demand for smaller devices with more function, it is increasingly critical that answers be found to these problems. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.